Search - vending machine vhdl

[VHDL-FPGA-Verilog] FSM2

Description: vhdl final state mashine 售货机-vhdl final state mashine vending machine
Platform: | Size: 1788928 | Author: wwwss | Hits:

[VHDL-FPGA-Verilog] zidongshouhuoji

Description: 自动售货机的VHDL代码，包括选商品，出货，退货，找零等功能-The VHDL code for a vending machine, including the selection of goods, shipping, returns, Keep the change and other functions
Platform: | Size: 5120 | Author: 赵玲 | Hits:

[VHDL-FPGA-Verilog] shouhuoji

Description: 使用文本方法编写的自动售货机的vhdl代码-Use a text methodology for the preparation of the vhdl code for a vending machine
Platform: | Size: 35840 | Author: 小陈 | Hits:

[VHDL-FPGA-Verilog] VendingmachinesimulationwithVHDL

Description: 自动售货机VHDL程序与仿真功能：货物信息存储，进程控制，硬币处理，余额计算，显示等功能。说明：显示的钱数coin的以5角为单位。 -Vending machine simulation of VHDL procedures and functions: cargo information storage, process control, coin handling, balance calculation, display and other functions. Description: The coin shows the amount of money in order to 5 units of angle.
Platform: | Size: 146432 | Author: Zhu | Hits:

[VHDL-FPGA-Verilog] 8.21VHDL

Description: 8.21 自动售货机VHDL程序与仿真2010/05/04-8.21 vending machine and simulation of VHDL procedures
Platform: | Size: 143360 | Author: 阿锦 | Hits:

[Other] alto

Description: 用VHDL语言设计一个自动售货机，此机能出售2元的一种商品。顾客投入硬币的钱数每次只允许投入一枚5角或1元的硬币，累计投入2元硬币给出一个商品，此操作通过按动相应的一个按键来模拟，并同时用数码管将投币额显示出来。如果投入1元5角以后，再投入1枚1元，则应给出一个商品，同时找回5角。-VHDL language used to design a vending machine, the function of a commodity sold two yuan. The amount of money customers put coins into a time allows only 5 cents or 1 yuan coins accumulated coins into two yuan a given commodity, this action by pressing a button corresponding to simulate, while a digital pipe to vote currency amount displayed. If the input angle after 5 1 yuan, and then put a 1 yuan, should be given a product, and get back 5 angle.
Platform: | Size: 121856 | Author: 林述颖 | Hits:

[Software Engineering] Vendingmachine

Description: 自动售货机控制系统设计思路及VHDL控制程序 -Vending machine control system design concept and control procedures VHDL
Platform: | Size: 91136 | Author: Section | Hits:

[VHDL-FPGA-Verilog] sodamachine

Description: 刚做完的一个实验，传上来分享一下写的一般，请见谅原题是麻省理工的一道EDA设计题：设计一个自动售货机系统，卖soda水的，只能投进三种硬币，要正确的找回钱数。（1）用到有限状态机；（2）用VHDL编程 -Just finished an experiment, transfer up to share writing in general, please forgive the original question is a Massachusetts Institute of Technology EDA design problem: design a vending machine system, sold soda water, and only dropped into three types of coins, to Find the right amount of money. (1) used finite state machine (2) using VHDL programming
Platform: | Size: 232448 | Author: Han | Hits:

[VHDL-FPGA-Verilog] AutoCVM

Description: this pdf describes automatic chocolate vending machine using VHDL
Platform: | Size: 221184 | Author: chitturi | Hits:

[VHDL-FPGA-Verilog] auto-buy-machine

Description: 自动售货机的VHDL程序-VHDL program vending machines
Platform: | Size: 2048 | Author: ddw | Hits:

[VHDL-FPGA-Verilog] zidongshouhuoji

Description: 使用VHDL语言实现的一个自动售货机的程序。适合VHDL初学者使用。-VHDL language using a vending machine program. VHDL suitable for beginners.
Platform: | Size: 388096 | Author: shally | Hits:

[VHDL-FPGA-Verilog] sellpencil

Description: 用VHDL语言设计的自动售铅笔机的程序，还有调试仿真波形图以及参考文献-VHDL language design with pencil vending machine program, as well as commissioning and the reference waveform simulation
Platform: | Size: 106496 | Author: 不会 | Hits:

[VHDL-FPGA-Verilog] autosell

Description: VHDL语言的自动售货机，作为毕业设计与课程设计，已调试过了可以下载使用-VHDL language vending machine, you can download have been used to debug
Platform: | Size: 2048 | Author: 李小平 | Hits:

[VHDL-FPGA-Verilog] Vending_Machine_up

Description: VHDL vending machine up grade v9
Platform: | Size: 2512896 | Author: simyunsub | Hits:

[VHDL-FPGA-Verilog] shouhuoji

Description: 自动售货机相关文献，VHDL代码，仿真实验和EDA实验-Vending machine related literature, VHDL code and EDA experiments, simulation experiment
Platform: | Size: 734208 | Author: geng | Hits:

[Other] SHJ

Description: 自动售货机控制系统VHDL有限状态机实现利用VHDL可以避免繁琐的过程，直接利用状态转换图进行状态机的描述-Automatic vending machine control system VHDL finite state machine implementation To avoid the tedious process of VHDL, the direct use of the description of the state transition diagram for state machine
Platform: | Size: 239616 | Author: jackychen | Hits:

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[VHDL-FPGA-Verilog] FSM2

[VHDL-FPGA-Verilog] zidongshouhuoji

[VHDL-FPGA-Verilog] shouhuoji

[VHDL-FPGA-Verilog] VendingmachinesimulationwithVHDL

[VHDL-FPGA-Verilog] 8.21VHDL

[Other] alto

[Software Engineering] Vendingmachine

[VHDL-FPGA-Verilog] sodamachine

[VHDL-FPGA-Verilog] AutoCVM

[VHDL-FPGA-Verilog] auto-buy-machine

[VHDL-FPGA-Verilog] zidongshouhuoji

[VHDL-FPGA-Verilog] sellpencil

[VHDL-FPGA-Verilog] autosell

[VHDL-FPGA-Verilog] Vending_Machine_up

[VHDL-FPGA-Verilog] shouhuoji

[Other] SHJ

[VHDL-FPGA-Verilog] VHDL_of_vending_machine

[VHDL-FPGA-Verilog] Card_Seller

[Software Engineering] VHDLSHOUHUOJI

[VHDL-FPGA-Verilog] sell

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